Semiconductor memory having word line discharge current controll

Details Semiconductor memory having word line discharge current controll Semiconductor memory having word line discharge current controll

1984-03-28

1986-10-21

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365155, 365179, 365190, G11C 700

Patent

active

046189440

ABSTRACT:
A semiconductor memory comprising at least memory cells, word lines (W.sub.+, W.sub.-), bit lines (BL, BL) and word line discharge circuits to be co-operated together with a word line discharge current controller. The word line discharge current controller is operative to gradually reduce a word line discharge current absorbed from the word line W.sub.- to the word line discharge circuit together with a gradual attenuation of an inverse current from the bit line to the corresponding memory cell.

REFERENCES:
patent: 4370736 (1983-01-01), Takahashi
patent: 4464735 (1984-08-01), Toyoda et al.

Affiliated with

Also associated with

Rating

Semiconductor memory having word line discharge current controll does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory having word line discharge current controll, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory having word line discharge current controll will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1293276