Method of fabricating dual gate

Details Method of fabricating dual gate Method of fabricating dual gate

1999-01-08

2000-11-21

Nelms, David

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438232, 438227, 438228, 438221, H01L 218238

Patent

active

061502057

ABSTRACT:
A method of fabricating a dual gate. A first conductive type region and a second conductive type region isolated by an isolation structure is provided. A polysilicon layer is formed on the first and the second conductive type regions. A diffusion layer containing second type conductive ions is formed on a second part of the polysilicon layer which covers the second conductive type region. First conductive ions are implanted into a part of the first conductive region which covers the first conductive type region. A first thermal process is performed. A metal layer is formed, and a second thermal process is performed, so that the metal layer is transformed into a metal silicide layer. A dielectric layer is formed on the metal layer. The dielectric layer, the metal silicide layer, diffusion layer, and the polysilicon layer are patterned to form a dual gate.

REFERENCES:
patent: 5780330 (1999-07-01), Choi

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