Semiconductor memory apparatus with internal synchronization

Details Semiconductor memory apparatus with internal synchronization Semiconductor memory apparatus with internal synchronization

1990-02-15

1991-07-02

Bowler, Alyssa H.

Static information storage and retrieval

Read/write circuit

Precharge

365210, 3652335, G11C 700, G11C 11407, G11C 11413

Patent

active

050291351

ABSTRACT:
A semiconductor memory apparatus of an internal synchronization type uses a clock signal generated by detecting a change in address or control signal as an internal synchronization signal. The apparatus includes a dummy memory cell for fixing data thereto in advance; a precharging circuit for precharging an internal memory cell and the dummy cell; a precharge completion detector for detecting the completion of the precharging operation when a dummy bit line from the dummy cell attains a predetermined voltage level by the precharging operation, the precharge completion detector transmitting a signal for completing the precharging operation with respect to the precharging circuit; and a device for reading or writing data through a bit line to the memory cell by the completion of the precharging operation by the precharge completion detector.

REFERENCES:
patent: 4417328 (1983-11-01), Ochii
patent: 4888737 (1989-12-01), Sato
patent: 4953130 (1990-08-01), Houston

Affiliated with

Also associated with

Rating

Semiconductor memory apparatus with internal synchronization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory apparatus with internal synchronization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory apparatus with internal synchronization will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1252968