Method of fabricating GMR devices

Details Method of fabricating GMR devices Method of fabricating GMR devices

1996-10-07

1999-01-19

Brown, Peter Toby

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438 3, 438131, 438266, 438688, H01L 218238

Patent

active

058613285

ABSTRACT:
A method of fabricating GMR devices on a CMOS substrate structure with a semiconductor device formed therein. The method includes forming a dielectric system with a planar surface having a roughness in a range of 1 .ANG. to 20 .ANG. RMS on the substrate; disposing and patterning films of giant magneto-resistive material on the planar surface so as to form a memory cell; disposing a dielectric cap on the cell so as to seal the cell and provide a barrier to subsequent operations; forming vias through the dielectric cap and the dielectric system to interconnects of the semiconductor device; forming vias through the dielectric cap to the magnetic memory cell; and depositing a metal system through the vias to the interconnects and to the memory cell.

REFERENCES:
patent: 5374578 (1994-12-01), Patel et al.
patent: 5389566 (1995-02-01), Lage
patent: 5567636 (1996-10-01), Jones, Jr.
patent: 5659499 (1997-08-01), Chen et al.

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