Level shifter for a liquid crystal display

Electronic digital logic circuitry – Interface – Supply voltage level shifting

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Details

326 86, H03K 190185

Patent

active

060492287

ABSTRACT:
This invention is related to a level shifter in an LCD using dual power voltages. A gate voltage generator generates a gate voltage through a charge pumping not to turn on both a PMOS transistor and an NMOS transistor at the same time, and the PMOS transistor is switched by the gate voltage. In this level shifter, a current to generate an output signal flows instantly only the moment the PMOS transistor and the NMOS transistor are switched, and an unwanted current path is therefore not formed. Therefore, a voltage level can be shifted without the unnecessary power consumption in the level shifter.

REFERENCES:
patent: 4045691 (1977-08-01), Asano
patent: 4064405 (1977-12-01), Cricchi et al.
patent: 4574273 (1986-03-01), Atsumi et al.
patent: 4631426 (1986-12-01), Nelson et al.
patent: 5650742 (1997-07-01), Hirano

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