Polysilicon CMP process for high-density DRAM cell structures

Details Polysilicon CMP process for high-density DRAM cell structures Polysilicon CMP process for high-density DRAM cell structures

1997-02-26

1998-08-04

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438633, H01L 218242

Patent

active

057892903

ABSTRACT:
Pass transistors are formed on the active device regions of a substrate and a layer of silicon oxide is deposited over the transistors and the surface of the layer of silicon oxide is planarized. A thin layer of silicon nitride is deposited on the oxide layer and then vias are opened through the silicon nitride and silicon oxide layers to expose one of the source/drain regions of each of the pass transistors in the memory array. A layer of polysilicon is deposited so as to extend through the vias, forming polysilicon vertical interconnects in contact with the source/drain regions of the pass transistors and then the layer of polysilicon is patterned to form capacitor bottom plates, with each of the capacitor bottom plates connected to a corresponding source/drain region. A second layer of silicon oxide is deposited to cover the capacitor bottom plates and photolithography is performed to provide a plurality of openings through the second silicon oxide layer to each of the capacitor bottom plates. Polysilicon is deposited to fill each of the openings and chemical mechanical polishing is performed to remove excess polysilicon using the silicon oxide layer as a polish stop. The second oxide layer is stripped to leave the capacitor bottom plates with fins or posts extending vertically from the bottom plates. A capacitor dielectric is then formed over the capacitor bottom electrodes, capacitor upper electrodes are formed, and further processing continues in the conventional manner.

REFERENCES:
patent: 5084405 (1992-01-01), Fazan et al.
patent: 5627094 (1997-05-01), Chan et al.
patent: 5674783 (1997-10-01), Jang et al.

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