Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-05-27
2000-04-11
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438424, 438692, H01L 21336, H01L 2176, H01L 21461
Patent
active
060487712
ABSTRACT:
A method of forming a shallow trench isolation structure includes etching a substrate to form a trench. Then, an oxide layer is deposited in the trench and over the substrate by using high-density plasma. The oxide layer is pointed since it is formed by high-density plasma chemical vapor deposition. A stop layer made of silicon nitride, silicon oxy-nitride or boron nitride is formed on the oxide layer. The hardness of the stop layer is higher than that of the oxide layer so the protuberance of the oxide layer will be first removed during chemical mechanical polishing.
REFERENCES:
patent: 5721173 (1998-02-01), Yano et al.
patent: 5906297 (1999-09-01), Saki
patent: 5968842 (1999-10-01), Hsiao
patent: 5994201 (1999-11-01), Lee
Lin Tony
Wu Juan-Yuan
Yeh Wen-Kuan
Jones Josetta
Niebling John F.
United Microelectronics Corp.
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