Process for the surface treatment of semiconductor slices

Details Process for the surface treatment of semiconductor slices Process for the surface treatment of semiconductor slices

1990-09-12

1992-11-17

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 11, 51281SF, H01L 21304

Patent

active

051643235

ABSTRACT:
Semiconductor slices, in particular having the surface polished on both ss, can be provided with a surface which effects the formation of gettering centers. These centers include stacking faults and/or dislocation networks in subsequent thermal treatment steps by a pressure loading being exerted on them with the aid of an elastic pressure transmission medium which causes local pressure inhomogeneities. A material erosion, for example in the form of scratches, is not necessary in this process. Advantageously, the treatment is carried out during a template polishing step in which a suitable pressure transmission medium is in contact with the rear side of the slice. The process makes available semiconductor slices with gettering action on one side which have a high surface quality on both sides.

REFERENCES:
patent: 3905162 (1975-09-01), Lawrence et al.
patent: 4042419 (1977-08-01), Heinke et al.
patent: 4081928 (1978-04-01), Kinnebrew et al.
patent: 4132037 (1979-01-01), Bonora
patent: 4539050 (1985-09-01), Kramler et al.
patent: 4587771 (1986-05-01), Buchner et al.

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