Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-02-24
1999-02-02
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438666, H01L 218242
Patent
active
058664548
ABSTRACT:
A structure and a method to increase the capacitance of a DRAM capacitor by forming a capacitor electrode with cellular voids to add surface area. According to the method: a transfer transistor with a gate electrode and source-drain electrode regions is formed on a semiconductor substrate. An insulating layer is formed on the semiconductor substrate and the transfer transistor, and the insulating layer is etched to form a contact void for exposing the surface of one of the source-drain electrode areas as a contact. A first conductive layer is formed on the insulating layer and is coupled to the contact through the contact void. On the first conductive layer, at least one middle insulating layer and one middle conductive layer are formed alternately to construct a multiple layer structure. Within the middle insulating layer(s), intercommunicating voids are formed through which the middle conductive layer is coupled to the first conductive layer is coupled to the first conductive layer. Thereafter, the middle conductive layer, the middle insulating layer and the first conductive layer are etched selectively to define an area of a capacitor. The middle insulating layer is removed by isotropic etching to form surface-increasing voids, and a cellular structure as a storage electrode is formed by the first conductive layer and the middle conductive layer. A dielectric layer is formed on the exposed surface of the storage electrode. A second conductive layer as an opposed electrode of the capacitor is then formed on the dielectric layer.
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Chaudhari Chandra
United Microelectronics Corporation
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