Static information storage and retrieval – Read/write circuit – Testing
Patent
1990-03-20
1991-09-03
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Testing
371 211, G11C 1300
Patent
active
050460498
ABSTRACT:
In a memory device(DRAM), an improved flash write test method is disclosed whereby all the memory cells in a memory cell array of a memory device can be written with the internally same data or the externally same data. The bit lines are arranged such that the bit lines B/L and B/L are alternating throughout the memory cell array and such that one word line is connected to only one type(either B/L or B/L) of bit lines, and the data supply circuit is formed by a data controller which controls input/output drives according to the type of the bit lines connected to the selected word line.
REFERENCES:
patent: 4661930 (1987-04-01), Tran
patent: 4703453 (1987-10-01), Shinoda
Choi Hoon
Dong-Il Seo
Fears Terrell W.
Samsung Electronics Co,. Ltd.
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