Semiconductor memory device including data output circuit capabl

Details Semiconductor memory device including data output circuit capabl Semiconductor memory device including data output circuit capabl

2000-01-07

2000-12-26

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36518911, G11C 700

Patent

active

061669660

ABSTRACT:
A semiconductor memory device includes an output control signal generation circuit for generating an output control signal to designate initiation of data output according to an external control signal, and a boosting circuit boosting an external power supply voltage. Each of the plurality of output control circuits generates an output permit signal with the output level of the boosting circuit as the activation level in response to activation of an output control signal. The output permit signals are transmitted to a plurality of output circuits by a corresponding one of a plurality of signal lines. Each of the plurality of output circuits drives the potential of a corresponding output terminal according to a read out data signal and an output permit signal.

REFERENCES:
patent: 4882507 (1989-11-01), Tatsumi et al.
patent: 5663912 (1997-09-01), Yamauchi
patent: 5831908 (1998-11-01), Tsuji
patent: 5949721 (1999-09-01), Kwon et al.
patent: 5959900 (1999-09-01), Matsubara
patent: 6052329 (2000-04-01), Nishino et al.

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