Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1989-09-28
1991-02-26
Gossage, Glenn
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, 36523001, 36523006, 36518902, G11C 700, G11C 1140, G11C 11407
Patent
active
049966707
ABSTRACT:
A fused, redundancy selection circuit is disclosed which is disabled by the absence of a chip select signal. The circuit has the feature of avoiding the use of nodes with a floating potential and in this manner it provides an enhanced radiation hardened characteristic. The circuit is effectively disabled if no redundancy is required on a particular memory chip, by leaving fuses which are a part of the circuit, intact. Alternately, if the memory chip is tested to have defects, the redundancy circuit is selectively enabled to provide the desired redundancy for the chip, by blowing fuses which are a part of the circuit. Thereafter, the redundancy circuit is now an active part of the memory chip and it is selectively enabled when the chip select signal is applied to the chip. An advantageous feature of the circuit is that it does not dissipate power when its function is not required either because its enabling fuses have not been blown or alternately when the chip select signal is off. In this manner, a zero standby power, radiation hardened memory redundancy circuit has been provided.
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Ciraula Michael K.
Durham Christopher M.
Jallice Derwin L.
Bowler Alyssa H.
Gossage Glenn
Hoel John E.
International Business Machines - Corporation
Wurm Mark A.
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