Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1988-10-27
1990-06-05
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36523008, G11C 1300
Patent
active
049319957
ABSTRACT:
A data writing method in a DRAM comprises the steps of bringing a row address strobe input signal into an enabling state and successively changing a signal indicative of a row address while the row address strobe input signal is in the enabling state, thereby to write data successively into a plurality of memory cells designated by the row addresses.
REFERENCES:
patent: 4575825 (1986-03-01), Ozaki et al.
patent: 4596004 (1986-06-01), Kaufman
patent: 4685089 (1987-08-01), Patel
patent: 4764901 (1988-08-01), Sakurai
patent: 4811299 (1989-03-01), Miyazawa et al.
Minutes of JC-42.3.2 Dram Task Group Meeting held on Jun. 16-17, 1987 in San Diego.
Ogawa Toshiyuki
Okasaka Yasuhiko
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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