Write/precharge flag signal generation circuit and circuit...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S191000

Reexamination Certificate

active

07054210

ABSTRACT:
Provided is a bitline isolation circuit in a sense amplifier generating an isolation signal for controlling an isolation circuit to isolate a connection between a bitline sense amplifier and a bitline at the beginning of sensing of a read operation, according to an output of a control unit generating an isolation control signal, a start signal of the bitline sense amplifier, and a memory block select signal. The control unit includes: a write pulse generation unit for generating a first control signal, according to a first input signal as a bank address signal latched for every clock, a second input signal generated when a write or a read command is inputted, and a third input signal having a different level according to the read or the write command; and an isolation control signal generation unit for generating the isolation control signal, according to the first control signal and the second control signal having a different level according to a row active operation and a precharge operation.

REFERENCES:
patent: 6487132 (2002-11-01), Bae et al.
patent: 6618319 (2003-09-01), Ooishi et al.
patent: 6862244 (2005-03-01), Lee

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