Write pointer error recovery systems and methods

Static information storage and retrieval – Read/write circuit – Multiplexing

Reexamination Certificate

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Details

C365S230020, C365S230060, C365S193000

Reexamination Certificate

active

07106633

ABSTRACT:
Write pointer error recovery systems and methods are provided. A write pointer from a write pointer circuit may cause a demultiplexer circuit to direct data from a memory cell to a desired bit location in a register. A read pointer may cause a multiplexer circuit to select data from a desired bit location in the register to provide as output data or to select one of the bits of the write pointer. The write pointer may be incremented by a data strobe signal. The state of the write pointer may be determined by reading the bits of the write pointer, and the write pointer may be synchronized via a reset line. Other embodiments are also claimed and described.

REFERENCES:
patent: 4459681 (1984-07-01), Ohtsuka
patent: 5398209 (1995-03-01), Iwakiri et al.
patent: 6118724 (2000-09-01), Higginbottom
patent: 6172927 (2001-01-01), Taylor
patent: 6721864 (2004-04-01), Keskar et al.
patent: 6853588 (2005-02-01), Kim et al.

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