Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-07-14
2008-10-28
Baderman, Scott T. (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S038110, C714S819000
Reexamination Certificate
active
07444544
ABSTRACT:
A write filter cache system for protecting a microprocessor core from soft errors and method thereof are provided. In one aspect, data coming from a processor core to be written in primary cache memory, for instance, L1 cache memory system, is buffered in a write filter cache placed between the primary cache memory and the processor core. The data from the write filter is move to the main cache memory only if it is verified that main thread's data is soft error free, for instance, by comparing the main thread's data with that of its redundant thread. The main cache memory only keeps clean data associated with accepted checkpoints.
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Bose Pradip
Hu Zhigang
Li Xiaodong
Rivers Jude A.
Baderman Scott T.
International Business Machines - Corporation
Schell Joseph
Scully , Scott, Murphy & Presser, P.C.
Trepp, Esq. Robert M.
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