Write-assisted memory cell and method of operating same

Static information storage and retrieval – Systems using particular element – Flip-flop

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365156, G11C 1100

Patent

active

057645647

ABSTRACT:
For a memory cell comprising a latch with cross-coupled inverters and an n-channel access transistor, the inverter that can contend with the access transistor is connected not between power and ground but between power and a transistor that disconnects the inverter from ground when the memory cell is being written. This allows transistors in the memory cell to be small and still function properly, without requiring that a port be provided for the complement of the data signal. The invention is important when there are several write ports to the memory cell and the addressing overhead is significant.

REFERENCES:
patent: 4777623 (1988-10-01), Shimazu et al.
patent: 4821233 (1989-04-01), Hsieh
patent: 5040146 (1991-08-01), Mattausch et al.
patent: 5301147 (1994-04-01), Guo et al.
patent: 5325325 (1994-06-01), Azuma

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