Write-assist SRAM cell

Details Write-assist SRAM cell Write-assist SRAM cell

2008-12-29

2010-12-14

Nguyen, Tuan T (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S189160, C365S230060, C365S156000

Reexamination Certificate

active

07852661

ABSTRACT:
An integrated circuit structure includes a word-line; a column select line; and a latch. The latch includes a first storage node and a second storage node complementary to each other; and an operation voltage node. A control circuit is coupled between the operation voltage node and the latch. The control circuit includes a first input coupled to the word-line; and a second input coupled to the column selection line. The control circuit is configured to interconnect the operation voltage node and the latch when both the word-line and the column select line are selected, and disconnect the operation voltage node and the latch when at least one of the word-line and the column select line is not selected.

REFERENCES:
patent: 6542401 (2003-04-01), Yamauchi et al.
patent: 6590802 (2003-07-01), Nii
patent: 6606276 (2003-08-01), Yamauchi et al.
patent: 6953726 (2005-10-01), Nowak et al.
patent: 7177177 (2007-02-01), Chuang et al.
patent: 7511988 (2009-03-01), Lin et al.
patent: 7613031 (2009-11-01), Hanafi et al.
patent: 7643357 (2010-01-01), Braceras et al.
Ramadurai, V., et al., “A Disturb Decoupled Column Select 8T SRAM Cell,” IEEE 2007 Custom Integrated Circuits Conference (CICC), 2007, pp. 25-28.

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