Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1998-06-26
1999-08-03
Mai, Son
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365190, 326 83, 327108, G11C 700
Patent
active
059333715
ABSTRACT:
In a DQ write amplifier, a data line DQ is precharged and driven by one P-channel MOS transistor and a data line /DQ is precharged and driven by one P-channel MOS transistor. These transistors are controlled by a control circuit composed of NAND circuits and inverters. In the DQ write amplifier, a transition is made from the precharge state to the write state through the use of only a write signal applied to the control circuit.
REFERENCES:
patent: 4697107 (1987-09-01), Haines
patent: 4983860 (1991-01-01), Yim et al.
patent: 5216292 (1993-06-01), Imazu et al.
patent: 5387824 (1995-02-01), Michelsen
patent: 5450019 (1995-09-01), McClure et al.
patent: 5583460 (1996-12-01), Dohi et al.
patent: 5598371 (1997-01-01), Lee et al.
patent: 5602783 (1997-02-01), Ong
patent: 5698994 (1997-12-01), Tsuji
patent: 5812461 (1998-09-01), Komarek et al.
Kabushiki Kaisha Toshiba
Mai Son
LandOfFree
Write amplifier for use in semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Write amplifier for use in semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Write amplifier for use in semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-855670