Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-01-31
2006-01-31
Wojciechowicz, Edward (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S211000, C438S218000, C257S396000
Reexamination Certificate
active
06991978
ABSTRACT:
A word line structure with a single-sided partially recessed gate structure. The word line structure includes a gate structure, a first gate spacer, and a second gate spacer. The gate structure includes a gate dielectric layer, a first gate layer, a second gate layer, and a gate capping layer and has a recess region adjacent to one of opposing sidewalls of the second gate layer. The first gate spacer is disposed over opposing sidewalls of the gate dielectric layer and the first gate layer. The second gate spacer is disposed over opposing sidewalls of the gate structure and covers the first gate spacer. A method for forming a word line structure with a single-sided partially recessed gate structure is also disclosed.
REFERENCES:
patent: 5591664 (1997-01-01), Wang et al.
Kuan Shih-Fan
Wu Kuo-Chien
Nanya Technology Corporation
Quintero Law Office
Wojciechowicz Edward
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