Wiring tape for semiconductor device including a buffer...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond

Reexamination Certificate

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Reexamination Certificate

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07038325

ABSTRACT:
In a semiconductor device having a three-layered buffer layer comprising core layer1having interconnected foams such as a three-dimensional reticular structure and adhesive layers2provided on both sides of the core layer as a stress buffer layer between semiconductor chip5and wiring4to lessen a thermal stress generated between the semiconductor device and the package substrate, where a thickness ratio of the core layer1to total buffer layer is at least 0.2, the production process can be simplified by using such a buffer layer, thereby improving the mass production capacity and enhancing the package reliability.

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