Wires on demand: run-time communication synthesis for...

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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C326S038000

Reexamination Certificate

active

07902866

ABSTRACT:
A method, and system, for reconfiguring an FPGA which has a static region and a dynamic region is provided. The method includes the steps of: (a) providing a dynamic module library having information of predetermined modules; (b) receiving a reconfiguration request external to the FPGA; (c) computing reconfiguration of the FPGA at a predetermined location using predetermined module information from the dynamic module library and the reconfiguration request, and generating reconfigurable partial bitstreams; and (d) sending partial bitstreams from the predetermined location to the FPGA to perform the reconfiguration.

REFERENCES:
patent: 7124391 (2006-10-01), Patterson
Early Access Partial Reconfiguration User Guide, UG208 (v1.1) Mar. 6, 2006, www.xilinx.com.

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