Wire-bonding method and semiconductor package using the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond

Reexamination Certificate

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C257S666000

Reexamination Certificate

active

07126229

ABSTRACT:
A wire-bonding method and a semiconductor package using the same are provided. The semiconductor package includes a carrier; a chip mounted on the carrier; a plurality of first wires and second wires alternatively arranged in a stagger manner, with a wire loop of each second wire being downwardly bent to form a deformed portion so as to provide a height different between the wire loops of each first wire and each second wire, wherein the first and second wires electrically connect the chip to the carrier; and an encapsulant for encapsulating the chip, the first wires, the second wires and a portion of the carrier. The height difference between the wire loops of each first wire and each second wire increases a pitch between adjacent first and second wires thereby preventing the wires from contact and short circuit with each other due to wire sweep during an encapsulation process.

REFERENCES:
patent: 5010010 (1991-04-01), Gautvik et al.
patent: 5910010 (1999-06-01), Nishizawa et al.
patent: 6252305 (2001-06-01), Lin et al.
patent: 2004/0041008 (2004-03-01), Mochida

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