Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-03-20
2007-03-20
Parker, Kenneth (Department: 2815)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S612000, C438S613000, C438S615000, C438S508000, C257S780000, C257S784000, C228S180220, C228S180500
Reexamination Certificate
active
10952156
ABSTRACT:
An assembly of a semiconductor chip (301) having an integrated circuit (IC) including at least one contact pad (320) on its surface (301a), wherein the contact pad has a metallization suitable for wire bonding, and an interconnect bonded to said contact pad. This interconnect includes a wire (304) attached to the pad by ball bonding (305), a loop (306) in the wire closed by bonding the wire to itself (307) near the ball, and a portion (307) of the remainder of the wire extended approximately parallel to the surface. The interconnect can be confined to a space (308) equal to or less than three ball heights from the surface.
REFERENCES:
patent: 5014111 (1991-05-01), Tsuda et al.
patent: 5172851 (1992-12-01), Matsushita et al.
patent: 5485949 (1996-01-01), Tomura et al.
patent: 5813115 (1998-09-01), Misawa et al.
patent: 5874354 (1999-02-01), Heitzer et al.
patent: 5899375 (1999-05-01), Yoshida et al.
patent: 5908317 (1999-06-01), Heo
patent: 6001723 (1999-12-01), Kelkar et al.
patent: 6017812 (2000-01-01), Yonezawa et al.
patent: 6079610 (2000-06-01), Maeda et al.
patent: 6172419 (2001-01-01), Kinsman
patent: 6194786 (2001-02-01), Orcutt
patent: 6207549 (2001-03-01), Higashi et al.
patent: 6232211 (2001-05-01), Tsukahara
patent: 6268662 (2001-07-01), Test et al.
patent: 6321976 (2001-11-01), Lo et al.
patent: 6329278 (2001-12-01), Low et al.
patent: 6333562 (2001-12-01), Lin
patent: 6564449 (2003-05-01), Tsai et al.
patent: 6601752 (2003-08-01), Maeda et al.
patent: 6933608 (2005-08-01), Fujisawa
patent: 6981317 (2006-01-01), Nishida
patent: 2003/0042621 (2003-03-01), Chen et al.
Brady III Wade James
Chu Chris C
Parker Kenneth
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Wire bonding for thin semiconductor package does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Wire bonding for thin semiconductor package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wire bonding for thin semiconductor package will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3730924