Wire bond pad arrangement having improved pad density

Details Wire bond pad arrangement having improved pad density Wire bond pad arrangement having improved pad density

1994-08-10

1995-08-22

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

257666, 257773, 257784, H01L 2944, H01L 2348, H01L 2960

Patent

active

054443032

ABSTRACT:
A wire bond pad arrangement (104) has an improved pad density for providing a plurality of wire bond terminations for interconnection with corresponding terminations (604) of an IC chip (302. The wire bond pad arrangement (104) includes a substrate (102) and a plurality of pads (912) disposed on the substrate (102) adjacent to one another to form a row of pads (912). Each of the pads (912) is formed in a trapezoidal shape having short and long sides parallel to one another and substantially perpendicular to a line from a central point of the pad (912) to a central point of the corresponding termination (604) of the IC chip (302). The long sides of adjacent pads (912) are positioned alternately towards and away from the corresponding terminations (604) of the IC chip 302).

REFERENCES:
patent: 5134462 (1992-07-01), Freyman et al.
patent: 5168368 (1992-12-01), Gow, 3rd et al.
patent: 5229638 (1993-07-01), Ito
patent: 5241133 (1993-08-01), Mullen, III et al.
patent: 5293066 (1994-03-01), Tsumura
patent: 5293067 (1994-03-01), Thompson et al.
patent: 5300815 (1994-04-01), Rostoker
patent: 5399904 (1995-03-01), Kozono

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