Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2001-11-16
2003-04-22
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S406000, C438S437000
Reexamination Certificate
active
06551897
ABSTRACT:
BACKGROUND
This invention relates generally to semiconductor wafer processing and, in particular, to processes that form trenches in wafers while reducing device stress and defects.
Isolation trenches are common features in integrated circuits. Trenches surround devices and isolate one device from another. Bonded wafers, especially bonded wafers made in accordance with U.S. Pat. No. 5,387,555 assigned to the same assignee as this invention, provide a bond oxide layer between a device substrate and a handle substrate. Trenches extend from the surface of the device substrate down to the bond oxide. The trench side walls and floors are then covered with one or more insulating materials. The trenches are filled with a conformal material, typically polysilicon. However, excess insulating material accumulates at the top corners of the trenches and interferes with the filling process. As a result, trenches have voids that extend to the tops of the trenches.
It is common to oxidize exposed surfaces of the device substrate or exposed surfaces of a polysilicon layer in order to convert the device silicon or the polysilicon into silicon dioxide and thereby form a region of isolating material. During a thermal oxidation process, each atom of silicon is joined by two atoms of oxygen. The corner regions at the top of a trench lined with thermal oxide come under stress. Those corner regions increase in volume and the increased volume creates stress in adjacent device area. The stress can result in device defects.
Accordingly, there is an unmet need for an improved process that provides isolation trenches in an integrated circuit without generating stress and device defects. In particular, there is an unmet need for an improved process that reduces device stress and device defects.
SUMMARY
The invention includes a new integrated circuit and a new method of manufacturing the integrated circuit. The integrated circuit has two or more device regions in a device substrate of semiconductor material, typically monocrystalline silicon. The device substrate may be either a single wafer of silicon or the device substrate of a bonded wafer. A bonded wafer may include a handle substrate of suitable material, also typically silicon. The handle substrate is bonded to the device substrate using an oxide bonding process that provides an oxide bonding layer of silicon dioxide on the bottom of the device substrate. The device substrate is separated into device regions by isolation trenches. Each isolation trench has a floor and sidewalls spaced from each other. The trench sidewalls extend into the device substrate. The sidewalls in a bonded wafer extend to the bonding oxide layer.
The isolation trenches are formed by masking the device substrate and removing device silicon from unmasked regions to form trenches. Each trench has a floor and sidewalls spaced from each other. A nominally conformal layer of insulating material, typically silicon dioxide, is formed on the sidewalls and the floor. The insulating material tends to increase in thickness at the upper corner openings of the trench to produce dogbone structure. The dogbone structures are removed by a plasma anisotropic etch. A semiconductor material (polysilicon) is deposited on the device substrate to fill the trenches. With the dogbone structure removed, any voids that form in the filling material are small and are spaced from the top of the trench. The filling material is planarized to the surface of the device substrate. Then the device substrate is covered with a pad oxide layer and a silicon nitride layer. The pad oxide layer may be deposited or thermally grown. The oxide and silicon nitride layers are selectively removed from regions between trenches and remain over the trenches during further thermal oxidations. The oxide and silicon nitride layers prevent the growth of thermal oxides in the trench filling voids and at the tops of the trenches adjacent to the sidewalls. After thermal oxidations are substantially completed (e.g. no further oxidations greater than 500 Å) the nitride mask over the trenches may be removed.
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Bajor George
Begley Patrick Anthony
Carmody Michael Sean
Hemmenway Donald Frank
McNamara Jeanne Marie
Fogg and Associates LLC
Fourson George
Intersil America's Inc.
Lundberg Scott U.
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