Wafer testing process of a semiconductor device comprising a red

Fishing – trapping – and vermin destroying

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437922, 148DIG93, G01R 3126, H01L 2166

Patent

active

053267095

ABSTRACT:
A wafer testing process of a semiconductor device provided with a redundancy circuit. The process comprises a step of removing a passivation film above a pad and link portion, pre-laser testing, laser-repairing, and final quality marking using an off-line inking method. Therefore, fabrication-test processes are simplified to one step by adopting the off-line inking method, thereby achieving productivity improvement, quality enhancement, and reduction of throughput time.

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patent: 4536949 (1985-08-01), Takayama et al.
patent: 4665295 (1989-05-01), McDavid
patent: 4795720 (1989-01-01), Kawanabe et al.
patent: 4816422 (1989-03-01), Yerman et al.

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