Wafer structure for securing bonding pads on integrated circuit

Details Wafer structure for securing bonding pads on integrated circuit Wafer structure for securing bonding pads on integrated circuit

1996-08-02

2000-09-05

Whitehead, Jr., Carl

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438620, 438622, 438638, 438739, H01L 2144

Patent

active

06114231&

ABSTRACT:
A wafer structure on an IC chip allows the bonding pads on the IC chip to be firmly secured to the IC chip, thereby preventing detachment of the bonding pads during assembly of the IC package. The wafer structure comprises a substrate on which at least a pad area is defined. The pad area is formed with a first insulating layer, a gate on the first insulating layer, a second insulating layer on the gate, and a third insulating layer on the second insulating layer. The second insulating layer has a plurality of lower openings formed therethrough and the third insulating layer has a plurality of upper openings formed therethrough, each upper opening corresponding to one of the lower openings. The lower openings are wider than the upper openings. Plugs are formed in the lower and upper openings and are bonded to a metallization layer which serves as a bonding pad for the IC chip. The wider lower part of the plugs allows them to be rigidly affixed within the openings, thus allowing the overlaying bonding pad to be firmly secured to the IC chip. Therefore, during assembly of the IC chip, the bonding pad is not readily detached from the IC chip, thus increasing the assembly yield of good IC packages.

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