Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2007-03-28
2010-11-02
Huynh, Andy (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S455000, C257S686000, C257SE23085, C257SE25013
Reexamination Certificate
active
07824959
ABSTRACT:
A method of forming a wafer level stack structure, including forming a first wafer including a first device chip, wherein the first device chip includes a plurality of input/output (I/O) pads, forming a second wafer including a second device chip, wherein each second device chip contains a second plurality of I/O pads, the second device chip is approximately equal in size to the first chip size, stacking the first wafer and the second wafer, and coupling the first wafer and the second wafer to each other. A method of forming a system-in-package for containing a wafer level stack structure, including forming a wafer level stack structure including a first device chip having a first plurality of input/output (I/O) pads and a second device chip having a second plurality of I/O pads, and forming a common circuit board to which the wafer level stack structure is connected.
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Korean Office Action Issued Nov. 18, 2005.
Notice of Allowance dated Apr. 12, 2010 for corresponding U.S. Appl. No. 11/822,630.
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Kim Gu-Sung
Lee Kang-Wook
Oh Se-Yong
Song Young-Hee
Harness & Dickey & Pierce P.L.C.
Huynh Andy
Samsung Electronics Co,. Ltd.
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