Wafer cleaning procedure useful in the manufacture of a non-vola

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438906, H01L 218247

Patent

active

058113347

ABSTRACT:
A wafer surface cleaning method is provided comprising immersion of the wafer in a H.sub.2 O:NH.sub.4 OH:H.sub.2 O.sub.2 solution at a temperature less than 65.degree. C. prior to formation of a thin oxide such as a tunnel oxide or gate oxide. Immersion of the wafer in a sub-65.degree. C. NH.sub.4 OH results in a smoother wafer surface that increase the charge-to-breakdown (Q.sub.BD) of the subsequently formed oxide. In the tunnel oxide embodiment, the lower temperature solution also reduces the oxide etch rate of the solution enabling a minimum overgrowth of gate oxide which, in turn, enables the addition of an in situ growth temperature anneal of the gate oxide without altering other process parameters.

REFERENCES:
patent: 4958321 (1990-09-01), Chang
patent: 5229334 (1993-07-01), Kato
patent: 5296411 (1994-03-01), Gardner et al.
patent: 5328867 (1994-07-01), Chien et al.
patent: 5516730 (1996-05-01), Saeed et al.

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