Etching a substrate: processes – Nongaseous phase etching of substrate – Using film of etchant between a stationary surface and a...
Reexamination Certificate
2003-03-06
2004-09-28
Mills, Gregory (Department: 1763)
Etching a substrate: processes
Nongaseous phase etching of substrate
Using film of etchant between a stationary surface and a...
C216S089000, C438S692000, C451S041000
Reexamination Certificate
active
06797190
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of semiconductor manufacturing and, more specifically, to an improved method and apparatus for a wafer carrier for chemical mechanical planarization usage.
2. Description of the Prior Art
The present invention relates to the technology of polishing or planarizing semiconductor surfaces including substrate surfaces during or after the process of processing these surfaces. The creation of semiconductor surfaces typically includes the creation of active devices in the surface of the substrates, the polishing of semiconductor surfaces can occur at any time within the sequence of processing semiconductors where such an operation of polishing is beneficial or deemed necessary.
That good surface planarity during the creation of semiconductor devices is of prime importance in achieving satisfactory product yield and in maintaining target product costs is readily evident in light of the fact that a semiconductor device typically contains a multiplicity of layers that form a structure of one or more layers superimposed over one or more layers. Any layer within that structure that does not have good planarity leads to problems of increased severity for the overlying layers. Most of the processing steps that are performed in creating a semiconductor device involve steps of photolithography that critically depend on being able to sharply define device features, a requirement that becomes increasingly more important where device features are in the sub-micron range or even smaller, down to about 0.1 &mgr;m. Planarity directly affects the impact that light has on the surface of for instance a layer of photoresist, a layer that is typically used for patterning and etching the various layers that make up a semiconductor device. Lack of planarity leads to light diffusion which leads to poor depth of focus and a limitation on feature resolution, i.e. features such as adjacent lines cannot be closely spaced, a key requirement in today's manufacturing environment.
Chemical mechanical polishing (CMP) is a method of polishing materials, such as semiconductor substrates, to a high degree of planarity and uniformity. The process is used to planarize semiconductor slices prior to the fabrication of semiconductor circuitry thereon, and is also used to remove high elevation features created during the fabrication of the microelectronic circuitry on the substrate. In order to attain optimum planarization of a semiconductor surface, it is very important to control polishing uniformity on the semiconductor surface. A wafer carrier for loading/unloading a semiconductor wafer to be polished unto a polishing platen in a chemical mechanical polishing apparatus gives crucial influence on polishing uniformity.
FIG. 1
shows a cross-sectional view of a prior wafer carrier
1
, which comprises a stainless steel plate
10
and a supporting film
12
. A plurality of through-holes
14
are formed in the stainless steel plate
10
. The supporting film
12
is attached on a bottom surface of the stainless steel plate
10
serving for a cushion. And, a semiconductor wafer
16
is received beneath the bottom surface of the stainless steel plate
10
. When loading the semiconductor wafer
16
, the through-holes
14
are evacuated so as to soak the semiconductor wafer
16
on the supporting film
12
, as shown in FIG.
1
. However, due to the material of the stainless steel plate
10
and the locally through-holes
14
, both of local uniformity and global uniformity on the polishing surface
18
of the semiconductor wafer
16
can not be properly controlled.
A prior membrane type wafer carrier
2
is therefore provided, as shown in FIG.
2
. The prior membrane type wafer carrier
2
comprises a stainless steel plate
20
, a flexible membrane
22
and a supporting film
24
. A plurality of through-holes
26
are formed in the stainless steel plate
20
. The supporting film
24
is attached on a bottom surface of the stainless steel plate
20
. The flexible membrane
22
is positioned under the supporting film
24
. A first surface of the flexible membrane
22
contacts the supporting film
24
and a second surface of the flexible membrane
22
opposite the first surface provides a wafer-receiving surface.
FIG. 3
is a bottom plane view of the stainless steel plate
20
. When loading a semiconductor wafer
28
, the through-holes
26
are evacuated and thus form a plurality of vacuum spaces on the second surface of the flexible membrane
22
to soak the semiconductor wafer
28
. Since the flexibility of the flexible membrane
22
, the global uniformity on the polishing surface of the semiconductor surface
28
can be improved during the polishing process. However, the through-holes
26
still provide adversely influence for local uniformity of the polishing surface of the semiconductor wafer
28
.
Accordingly, it is desirable to have an improvement on a wafer carrier structure of a chemical mechanical polishing apparatus to mitigate the issues of global uniformity and local uniformity for a chemical mechanical polishing process.
SUMMARY OF THE INVENTION
It is an objective of the present invention to provide a wafer carrier assembly for a chemical mechanical polishing apparatus, which can provide global uniformity and local uniformity for a semiconductor wafer during a chemical mechanical polishing process.
It is another objective of the present invention to provide a wafer carrier assembly for a chemical mechanical polishing apparatus, which is provided with a wafer carrier including a first plate and a second plate. By way of separating the first plate and the second plate and turning on a vacuum there-between to provide vacuum-chucking for a semiconductor wafer for loading it, and recombining the first plate and the second plate during a polishing process so as to provide local uniformity for the semiconductor wafer.
It is a further objective of the present invention to provide a wafer carrier assembly for a chemical mechanical polishing apparatus, which is provided with a flexible membrane positioned under a wafer carrier of the wafer carrier assembly to provide global uniformity for a semiconductor wafer during a polishing process.
It is still a further objective of the present invention to provide a method for chemical mechanical polishing a semiconductor wafer, which can improve global uniformity and local uniformity for the semiconductor wafer.
In order to achieve the above objectives, the present invention provides a wafer carrier assembly for a chemical mechanical polishing apparatus and a polishing method for the same. The present wafer carrier assembly comprises a first plate, a second plate and a flexible membrane. A plurality of protrusions are formed on a bottom surface of the first plate and a plurality of apertures pass through the second plate. Each of the protrusions is matched with one of the apertures such that the first plate and the second plate can detachably combine together. The flexible membrane is positioned under the second plate. A first surface of the flexible membrane contacts a bottom surface of the second plate and a second surface of the flexible membrane opposite the first surface provides a wafer-receiving surface. When loading a semiconductor wafer, the first plate is separated from the second plate and a vacuum is turn on there-between, thus a plurality of vacuum spaces are formed under the second surface of the flexible membrane beneath the apertures of the second plate to provide vacuum-chucking for a semiconductor wafer. During polishing the semiconductor wafer, the first plate and the second plate are recombined together to form a flat plate so that there is not any evacuated opening existing therein to adversely influence local uniformity of the semiconductor wafer. Besides, the flexible membrane improves global uniformity of the semiconductor wafer.
REFERENCES:
patent: 5958794 (1999-09-01), Bruxvoort et al.
patent: 6296557 (2001-10-01), Walker
Chen Hsueh-Chung
Hsu Chia-Lin
Hsu Shih-Hsun
Yu Art
MacArthur Sylvia
Merchant & Gould P.C.
Mills Gregory
United Microelectronics Corp.
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