Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1998-01-28
2000-09-19
Hoang, Huan
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365203, 36518518, 365194, G11C 1604
Patent
active
061222054
ABSTRACT:
A system for reading a memory cell of a memory array at voltage levels lower than an erased threshold voltage of the memory array. The system uses a voltage regulator which is coupled to the memory array for charging a desired row of the memory array to a supply voltage. The voltage regulator is further used for clamping the desired row at a voltage level which is no higher than a maximum programmed threshold voltage of the memory array. The voltage regulator is able to perform these functions while consuming no DC current. A voltage booster is coupled to the voltage regulator and to the memory array. The voltage booster is used for raising the voltage level of the desired row to a voltage above the maximum erased threshold voltage of the memory cell. This allows the memory cell to be read at voltage levels which are lower than the threshold voltage of the memory array.
REFERENCES:
patent: 5801991 (1998-09-01), Keeney et al.
patent: 5815445 (1998-09-01), Hull et al.
Hoang Huan
Microchip Technology Incorporated
Moy Jeffrey D.
Weiss Harry M.
LandOfFree
Voltage regulator and boosting circuit for reading a memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Voltage regulator and boosting circuit for reading a memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Voltage regulator and boosting circuit for reading a memory cell will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1080003