Voltage level translation for an output driver system with a bia

Details Voltage level translation for an output driver system with a bia Voltage level translation for an output driver system with a bia

1997-06-06

1999-11-16

Tokar, Michael

Electronic digital logic circuitry

Interface

Logic level shifting

326 71, 326 81, H03K 19094

Patent

active

059864729

ABSTRACT:
Circuit and method aspects are provided for voltage level translation circuit for an output driver. In a circuit aspect, a circuit includes an input mechanism for receiving an internal data signal of a first predetermined voltage range, at least two stacked transistors coupled to the input mechanism, and a bias generator coupled to the input mechanism and the at least two stacked transistors, the bias generator ensuring that the at least two stacked transistors operate below a predetermined maximum device voltage. The circuit further includes an output mechanism coupled to the at least two stacked transistors, the output mechanism providing an external signal of a second predetermined voltage range.

REFERENCES:
patent: 5635860 (1997-06-01), Westerwick
patent: 5684415 (1997-11-01), McManus
patent: 5723985 (1998-03-01), Van Tran et al.
patent: 5777490 (1998-07-01), Cases et al.
patent: 5834948 (1998-11-01), Yoshikazi et al.

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