Method for testing integrated circuits

Details Method for testing integrated circuits Method for testing integrated circuits

1997-12-16

2000-03-28

Ballato, Josie

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

G01R 3102

Patent

active

060436700

ABSTRACT:
The specification describes a technique for testing packaged or unpackaged IC devices in which the devices are aligned and placed onto a tacky layer of an anisotropic conductive medium (ACM). The tacky ACM layer provides the necessary electrical contact to the IC device while under test, and also preserves the alignment of the IC device during movement between stations. When electrical testing of the IC device is completed the IC device packages are lifted free of the tacky layer and permanently bonded to an interconnection substrate. In one embodiment the test interconnection substrate is a replica of the permanent interconnection substrate. In another mode of practicing the invention the test interconnection substrate is the actual permanent interconnection substrate, and the IC device is bonded in situ after electrical testing.

REFERENCES:
patent: 5140405 (1992-08-01), King et al.
patent: 5290710 (1994-03-01), Hai-Ali-Ahmadi et al.
patent: 5406210 (1995-04-01), Pedder
patent: 5440240 (1995-08-01), Wood et al.
patent: 5479694 (1996-01-01), Baldwin
patent: 5691041 (1997-11-01), Frankeny et al.
patent: 5851845 (1998-12-01), Wood et al.

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