Voltage down converter for semiconductor memory device

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

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Details

326 81, 327541, 36518909, 365226, H03K 1716

Patent

active

054932343

ABSTRACT:
A voltage down converter for a semiconductor memory device which includes memory blocks for storing a plurality of binary information, memory peripheral circuits for controlling the memory blocks and a reference voltage generator for dividing a supply voltage from an external power supply circuit to drive the memory blocks and the memory peripheral circuits. The voltage down converter comprises: a downed voltage driver for downing a reference voltage from the reference voltage generator into different levels according to standby and active modes and supplying the downed voltage to the memory blocks and the memory peripheral circuits; an overshoot detector for detecting whether a level of the downed voltage from the downed voltage driver exceeds a desired voltage level; and a voltage regulator for regulating the level of the downed voltage from the downed voltage driver being supplied to the memory blocks and the memory peripheral circuits in response to an output signal from the overshoot detector to remove an overshoot component generated in the downed voltage from the downed voltage driver. The level of the downed voltage is maintained constant and stable regardless of an overload. Therefore, the memory blocks and memory peripheral circuits can be protected from an overload and the reliability of the memory device can be enhanced.

REFERENCES:
patent: 5046052 (1991-09-01), Miyaji et al.
patent: 5063304 (1991-11-01), Iyengar
patent: 5280455 (1994-01-01), Kanaishi
patent: 5416747 (1995-05-01), Ohira
patent: 5426616 (1995-06-01), Kajigaya et al.
patent: 5434498 (1995-07-01), Cordoba et al.
patent: 5436586 (1995-07-01), Miyamoto

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