Volatile memory structure and method for forming the same

Details Volatile memory structure and method for forming the same Volatile memory structure and method for forming the same

2006-01-17

2006-01-17

Loke, Steven (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S241000, C438S242000, C438S244000, C438S245000, C438S246000, C438S247000, C438S248000

Reexamination Certificate

active

06987044

ABSTRACT:
A method for forming a volatile memory structure. A buried trench capacitor in each of a pair of neighboring trenches formed in a substrate. An asymmetric collar insulating layer is formed over an upper portion of the sidewall of each trench and has a high and a low level portions. A conductive layer is formed overlying the buried trench capacitor and below the surface of the substrate. The high level portion is adjacent to the substrate between the neighboring trenches and the low level portion is covered by the conductive layer. A dielectric layer is formed overlying the conductive layer. Two access transistors are formed on the substrate outside of the pair of the neighboring trenches, respectively, which have source/drain regions electrically connecting to the conductive layer. A volatile memory structure is also disclosed.

REFERENCES:
patent: 4801988 (1989-01-01), Kenney
patent: 5097381 (1992-03-01), Vo
patent: 5736760 (1998-04-01), Hieda et al.
patent: 5909044 (1999-06-01), Chakravarti et al.
patent: 6184549 (2001-02-01), Furukawa et al.

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