Volatile memory cell with interface charge traps

Details Volatile memory cell with interface charge traps Volatile memory cell with interface charge traps

1994-11-21

1997-03-04

Tran, Minhloan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257325, 257405, 257903, H01L 2976

Patent

active

056082509

ABSTRACT:
A semiconductor device is described, incorporating electron traps at the interface between a semiconductor substrate and a gate dielectric layer of an insulated gate field effect transistor, such device being capable of retaining charge in the electron traps for a certain time, allowing volatile memory circuits to be produced wherein each cell occupies only the area required for a single transistor.

REFERENCES:
patent: Re31083 (1982-11-01), DeKeersmaecker et al.
patent: 3856587 (1974-12-01), Yamazaki et al.
patent: 4217601 (1980-08-01), DeKeersmaecker et al.
patent: 4868618 (1989-09-01), Kalnitsky et al.
Solid State Electronics, vol. 33, No. 5, May 1990, Oxford GB pp. 523-530,. A. Kalnitsky et al., "Electronic States At SI-SI02 Interface Introduced by Implantation of Si in Thermal SI02".

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