VLSI chip having improved test access

Static information storage and retrieval – Read/write circuit – Multiplexing

Patent

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Details

365201, 371 3, 371 723, G11C 700

Patent

active

050291335

ABSTRACT:
An improved integrated circuit chip design which is better adapted to testing using existing circuit testers is disclosed. The chip includes a parallel load instruction which reduces the number of words of tester memory needed to load the internal scan registers. The parallel load instruction loads memory cells connected to the input pins of the chip which are then shifted into the scan registers.

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patent: 4916700 (1990-04-01), Ito et al.
patent: 4956818 (1990-09-01), Hatayama et al.
patent: 4980889 (1990-12-01), Deguise et al.
patent: 4982380 (1991-01-01), Koike

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