Static information storage and retrieval – Read/write circuit – Multiplexing
Patent
1990-08-30
1991-07-02
Clawson, Jr., Joseph E.
Static information storage and retrieval
Read/write circuit
Multiplexing
365201, 371 3, 371 723, G11C 700
Patent
active
050291335
ABSTRACT:
An improved integrated circuit chip design which is better adapted to testing using existing circuit testers is disclosed. The chip includes a parallel load instruction which reduces the number of words of tester memory needed to load the internal scan registers. The parallel load instruction loads memory cells connected to the input pins of the chip which are then shifted into the scan registers.
REFERENCES:
patent: 4809273 (1989-02-01), Jackowski et al.
patent: 4903270 (1990-02-01), Johnson et al.
patent: 4916700 (1990-04-01), Ito et al.
patent: 4956818 (1990-09-01), Hatayama et al.
patent: 4980889 (1990-12-01), Deguise et al.
patent: 4982380 (1991-01-01), Koike
Fleming Lee
La Fetra Ross V.
Clawson Jr. Joseph E.
Griffin Roland I.
Haggard Alan H.
Hewlett--Packard Company
LandOfFree
VLSI chip having improved test access does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with VLSI chip having improved test access, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and VLSI chip having improved test access will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1252951