Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization
Reexamination Certificate
2007-05-03
2010-06-15
Cho, James (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Signal level or switching threshold stabilization
C326S034000, C326S102000, C327S547000
Reexamination Certificate
active
07737720
ABSTRACT:
An integrated circuit is provided with logic blocks which draw their power from virtual supply rails. These virtual supply rails are connected by switch blocks to main supply rails. The switch blocks are subject to modulation to maintain the virtual supply rails at an intermediate voltage level such that a reduced voltage difference is applied across the logic block. This intermediate voltage level is used in a state retention mode in which the clock signal clk to the logic block is stopped and state signal values are maintained therein using this reduced virtual power rail derived voltage difference. When it is desired to resume processing then the full virtual rail voltages are restored by rendering the switch blocks fully conductive and then the clock is restarted. The switch blocks which are modulated by controllers which use feedback control based upon the sensed virtual rail voltages (VVddand Vgnd) while drawing their own power from the normal supply rails (Vddandgnd).
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Aitken Robert Campbell
Flynn David Walter
Idgunji Sachin Satish
ARM Limited
Cho James
Nixon & Vanderhye P.C.
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