Virtual ground MOS EPROM or ROM matrix

Details Virtual ground MOS EPROM or ROM matrix Virtual ground MOS EPROM or ROM matrix

1979-10-29

1981-07-28

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, 3072383, G11C 1140

Patent

active

042813972

ABSTRACT:
An array of rows and columns of memory cells of the virtual ground type employs a cell layout which has one column line per column instead of requiring extra lines for ground. Half of the column lines are used as outputs and half as ground. One output line and one ground line are selected by improved decode circuitry. The cell array is of a continuous web type wherein metal-to-silicon contacts are shared by four adjacent cells.

REFERENCES:
patent: 4174541 (1979-11-01), Schmitz

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