Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1981-12-24
1984-07-17
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365104, 365190, G11C 1140
Patent
active
044609817
ABSTRACT:
A virtual ground memory array where alternate bit lines in the array are selectively coupled to ground. The other bit lines are coupled to an input/output line. Diode-like shunting is used between the bit lines to eliminate parasitic paths particularly for higher programming potentials such as used in EPROMs. Substantially no increase in overhead is required to control these diode-like paths since the architecture allows them to be controlled by address signals.
REFERENCES:
patent: 4021781 (1977-05-01), Caudel
patent: 4281397 (1981-07-01), Neal et al.
patent: 4312047 (1982-01-01), Donoghue
Holler Mark A.
Van Buskirk Michael A.
Intel Corporation
Popek Joseph A.
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