Video display system using serial/parallel access memories

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365230, 340799, 364900, G11C 700

Patent

active

047232269

ABSTRACT:
A video display system employs a memory arrangement for the video data which is sequentially accessed for serial read-out of the bit-mapped video information at a high clock rate, and also randomly accessed in parallel by a microcomputer for generating and updating the information to be displayed. Parallel access to the memory by the microcomputer can occur while the serial video data is being clocked out, so microcomputer I/O and video output conflict only a very minimum amount. Dynamic MOS RAMs with a serial register added provide this dual port memory.

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