Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2008-01-07
2010-10-12
Loke, Steven (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S773000, C257S774000
Reexamination Certificate
active
07812438
ABSTRACT:
The invention is directed to an improved microelectronics device that reduces BEOL delamination by reducing the tensile stress imposed on the via which connects first level interconnects with the BEOL. Tensile stress imposed on the via is reduced by shifting the via towards the center of a silicon chip or alternatively shifting the UBM towards the corners of the silicon chip.
REFERENCES:
patent: 5315485 (1994-05-01), Magill et al.
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patent: 6833615 (2004-12-01), Geng et al.
patent: 7208348 (2007-04-01), Geng et al.
patent: 2005/0128721 (2005-06-01), Tay et al.
Jadhav Virendra R.
Questad David L.
Sikka Kamal K.
Wei Xiaojin
Zheng Jiantao
Brown Katherine S.
International Business Machines - Corporation
Jaklitsch Lisa U
Loke Steven
Thomas Kimberly M
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