Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-05-16
2006-05-16
Zarneke, David A. (Department: 2891)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000
Reexamination Certificate
active
07045455
ABSTRACT:
An integration approach to improve electromigration resistance in a semiconductor device is described. A via hole is formed in a stack that includes an upper dielectric layer, a middle TiN ARC, and a lower first metal layer and is filled with a conformal diffusion barrier layer and a second metal layer. A key feature is that the etch process can be selected to vary the shape and location of the via bottom. A round or partially rounded bottom is formed in the first metal layer to reduce mechanical stress near the diffusion barrier layer. On the other hand, a flat bottom which stops on or in the TiN ARC is selected when exposure of the first metal layer to subsequent processing steps is a primary concern. Electromigration resistance is found to be lower than for a via structure with a flat bottom formed in a first metal layer.
REFERENCES:
patent: 5470790 (1995-11-01), Myers et al.
patent: 5637534 (1997-06-01), Takeyasu et al.
patent: 6004876 (1999-12-01), Kwon et al.
patent: 6011311 (2000-01-01), Hsing et al.
patent: 6069072 (2000-05-01), Konecni et al.
patent: 6080660 (2000-06-01), Wang et al.
patent: 6090674 (2000-07-01), Hsieh et al.
patent: 6222272 (2001-04-01), Takayama et al.
patent: 6306732 (2001-10-01), Brown
patent: 6383920 (2002-05-01), Wang et al.
patent: 6433428 (2002-08-01), Watanabe et al.
patent: 6451181 (2002-09-01), Denning et al.
patent: 6522013 (2003-02-01), Chen et al.
patent: 6548905 (2003-04-01), Park et al.
patent: 6551919 (2003-04-01), Venkatesan et al.
patent: 6613664 (2003-09-01), Barth et al.
Guo Qiang
Lee Hong Lim
Loong Sang Yee
Low Chun Hui
Zhang Beichao
Chartered Semiconductor Manufacturing Ltd.
Zarneke David A.
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