Very large scale integrated planar read only memory

Details Very large scale integrated planar read only memory Very large scale integrated planar read only memory

1996-09-26

1998-03-24

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Precharge

365210, 365194, G11C 700

Patent

active

057320357

ABSTRACT:
An improved precharge timing control is provided by turning off the first one of a series of precharge clocks PC0 by means of discharging a single dummy word line. The dummy word line is comprised of a plurality of dummy word line segments wherein each of the segments are charged in parallel, but discharged in series. The discharge time required of the plurality of word line segments is sufficient to allow discharge of an end of a selected word line in the read only memory to ground. Improved timing with good performance is achieved by turning off the earliest precharge clock PC0 among a series of precharge clocks PC0 and PC1, for example, so that an improved precharge time for the ROM core for a fast process parameter is realized.

REFERENCES:
patent: 4982367 (1991-01-01), Miyatake
patent: 4989182 (1991-01-01), Mochizuki et al.

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