Very high-density DRAM cell structure and method for fabricating

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438195, 437 54, 357234, 257330, H01L 218242

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active

060965967

ABSTRACT:
A vertical transistor semiconductor and method of making a vertical transistor is provided. The vertical transistor is particularly suited for use in a DRAM cell. The structure permits a DRAM cell to be fabricated with a comparatively low number of masking layers. Moreover, the vertical nature of the transistor allows a larger number of transistors per surface area compared to conventional techniques. The method and apparatus also utilizes a buried digit line. The digit line may include a portion that is a metal material that in a preferred embodiment is step-shaped sidewall of the digit line. The transistor is particular suited for use with a variety of DRAM capacitors.

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