Vertical transistor structures having...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S329000, C257S401000, C257SE27084, C438S192000, C438S268000

Reexamination Certificate

active

10928522

ABSTRACT:
The present inventions include a vertical transistor formed by defining a channel length of the vertical-surrounding-gate field effect transistor with self-aligning features. The method provides process steps to define the transistor channel length and recess silicon pillars used to form the vertical-surrounding gate field effect transistor structure for use in the manufacture of semiconductor devices.

REFERENCES:
patent: 5414289 (1995-05-01), Fitch et al.
patent: 5780888 (1998-07-01), Maeda et al.
patent: 6740919 (2004-05-01), Piazza et al.
patent: 2002/0074585 (2002-06-01), Tsang et al.
patent: 2006/0030106 (2006-02-01), Beintner

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