Vertical double-gate field effect transistor

Details Vertical double-gate field effect transistor Vertical double-gate field effect transistor

1997-04-16

1998-07-14

Wilczewski, Mary

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438268, H01L 21336

Patent

active

057803277

ABSTRACT:
A vertical double-gate field effect transistor includes a source layer, an epitaxial channel layer and a drain layer arranged in a stack on a bulk or SOI substrate. The gate oxide is thermally grown on the sides of the stack using differential oxidation rates to minimize input capacitance problems. The gate wraps around one end of the stack, while contacts are formed on a second end. An etch-stop layer embedded in the second end of the stack enables contact to be made directly to the channel layer.

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