Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate
Reexamination Certificate
2006-06-27
2006-06-27
Flynn, Nathan J. (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having junction gate
C438S192000, C257S263000, C257S285000
Reexamination Certificate
active
07067363
ABSTRACT:
A vertical-conduction and planar-structure MOS device having a double thickness gate oxide includes a semiconductor substrate including spaced apart active areas in the semiconductor substrate and defining a JFET area therebetween. The JFET area also forms a channel between the spaced apart active areas. A gate oxide is on the semiconductor substrate and includes a first portion having a first thickness on the active areas and at a periphery of the JFET area, and a second portion having a second thickness on a central area of the JFET area. The second thickness is greater than the first thickness. The JFET area also includes an enrichment region under the second portion of the gate oxide.
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Camalleri Marco
Ferla Giuseppe
Frisina Ferruccio
Magri′ Angelo
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Flynn Nathan J.
Jorgenson Lisa K.
Mandala Jr. Victor A.
STMicroelectronics S.r.l.
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