Versatile system for limiting electric field degradation of...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Reexamination Certificate

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11180149

ABSTRACT:
The present invention provides a system for limiting degradation of a first semiconductor structure (304) caused by an electric field (314), generated from within the semiconductor substrate (302) by high voltage on a second semiconductor structure (310). A semiconductor device (300) is adapted to reduce the effective magnitude of the field—as realized at structure304—to some fractional component (320), or to render the angle (322)—at which the field approaches the first structure through a first substrate region (306)—acute. Certain embodiments of the present invention provide for: lateral recession of the first semiconductor structure to abut an isolation structure (312), which is disposed between the second semiconductor structure and the first substrate region; lateral recession of the first semiconductor structure from the isolation structure, so as to form a moat therebetween; and a counter-doped region (316) within the first substrate region.

REFERENCES:
patent: 5432366 (1995-07-01), Banerjee et al.
patent: 6864533 (2005-03-01), Yasuhara et al.
patent: 6878976 (2005-04-01), Coolbaugh et al.
patent: 7078787 (2006-07-01), Bulucea
patent: 7084477 (2006-08-01), Ishitsuka et al.
patent: 7091556 (2006-08-01), Edwards et al.

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